1. Field of the Invention
The present invention relates to switched power supplies, and more specifically, to a circuit which controls the operation of a switch in such a power supply. The circuit uses an adaptive control loop to change the state of the switch at the optimum time to minimize switching stress and power loss. The inventive circuit may also be used to control the change of state of a switch in other types of power controlling circuits in which the optimal switching time is dependent upon the voltage through the switch.
2. Description of the Prior Art
Switching or xe2x80x9cswitch modexe2x80x9d power supplies use a semiconductor device as a power switch to control the application of a voltage to a load. In a flyback power converter, for example, when the power switch is in the xe2x80x9conxe2x80x9d position (i.e., the device is conducting), the voltage is applied across a transformer, which stores energy in its magnetic core as the current through it increases. When the power switch is in the xe2x80x9coffxe2x80x9d position (i.e., the device is not conducting), the inductor voltage increases as the circuit attempts to compensate for the reduction in current by generating a back emf. The inductor voltage xe2x80x9cflies backxe2x80x9d above the input voltage and is typically clamped by a diode (or the body diode of a second switching device) at the output voltage level. With the diode being conductive, the stored energy in the transformer is transferred to an output capacitor and the other elements of the load. The current through the transformer then decreases until the energy in the magnetic core is depleted. The power switch is then turned back on to start another cycle. Just before being turned on, the voltage across the power switch is greater than the input voltage. As the power switch is turned on, the voltage falls and current in the switch increases, resulting in a loss of power.
The switching operation of the power switch is often controlled by a clock signal, with the duty cycle of the switch (the relative xe2x80x9conxe2x80x9d versus xe2x80x9coffxe2x80x9d time during the switching period) determining the output voltage of the circuit. This method of controlling the switch operation is termed xe2x80x9cpulse width modulationxe2x80x9d (PWM).
In some configurations of switched mode supplies, the load of the circuit may include a resonant network (typically an inductor and a capacitor) which acts to smooth the output signal and provide a back emf in the form of a sinusoidally varying waveform. This provides a zero-voltage or zero-current condition through the power switch which can be used to define the desirable switching point(s).
A xe2x80x9chalf-bridgexe2x80x9d (or Class-D inverter) is another type of switch mode power converter topology which is used to provide a dc source. In such a configuration, a center-tapped dc source is provided by using two smoothing capacitors in conjunction with two switching devices. The switching devices are operated so that they are, alternately switched xe2x80x9con.xe2x80x9d This can be accomplished by driving one of the switching devices with a clock signal which is an inverted version of the clock signal for the other device.
The switching devices in switch mode power converters are subjected to high stresses and potentially high switching power loss as a result of the switch being changed from one state to another while having a significant voltage across it. These effects increase linearly with the switching frequency of the PWM. Another drawback of switched power circuits is the electromagnetic interference arising from the large di/dt and dv/dt caused by the switch mode operation.
The noted disadvantages of switch mode power circuits are reduced if each power switch in the circuit is caused to change its state (from xe2x80x9conxe2x80x9d to xe2x80x9coffxe2x80x9d or vice versa) when the voltage and/or current through it is zero or at a minimum. Such a control scheme is termed xe2x80x9czero-voltagexe2x80x9d and/or xe2x80x9czero-currentxe2x80x9d switching. In the case of switching at a minimum voltage, the control scheme is termed xe2x80x9clow-voltagexe2x80x9d switching. It is therefore desirable to switch the switching device at instances of zero or minimum voltage in order to reduce stress on the switch and power loss of the power supply or converter.
In Zero Voltage Switching (ZVS) power converters, during each switching cycle the switch voltage is driven to zero by the action of the inductive load, and ideally the switch is then turned on. ZVS Resonant converters have a large LC tank to ensure that there is always sufficient inductive energy to drive the switch voltage to zero. In contrast, active Clamp ZVS Forward and Flyback converters have a relatively small inductance between switch and transformer, with smaller inductive energy and hence lower losses than resonant converters. However, the small inductance between switch and transformer causes two problems. Firstly, there is only a small amount of energy stored in the inductance to ring the switch voltage down towards ground. If there is insufficient energy for the switch voltage to reach zero, then the switch should ideally be turned xe2x80x9conxe2x80x9d when the voltage is at a minimum, before it rings back up again. This corresponds to Low Voltage Switching (LVS) operation. Secondly, the LC tank circuit formed by the small inductance and switch capacitance has a high resonant frequency. This means that there is only a small window of time for turning the switch xe2x80x9conxe2x80x9d at zero (or low) voltage. If the switch state is changed too soon or too late, there will be a potentially significant power loss associated with the switching operation.
One method of controlling the switch action in order to reduce power losses is for the switch control circuit to use a fixed time delay before turning the power switch on, where the delay is chosen to be approximately long enough for the switch voltage to have reached zero volts or its minimum value. Examples of this approach are found in the Unitrode UCI 875 range of Phase Shift Resonant Controllers, and the UC1580 range of Active Clamp/Reset PWM controllers, manufactured by the Unitrode Corporation. However, a disadvantage to this approach is that it allows for no variation in the amount of the fixed delay to take into account differences in the load, operating conditions, or parts tolerances arising in a high volume production environment. This situation can cause the power supply or converter to operate in a sub-optimal manner, because if the switching event occurs even a small amount of time after the point of minimum switch voltage, the switch voltage may be much higher, resulting in a large power loss. Another disadvantage of this approach is that the fixed delay must be designed into the switch controller. This creates a burden on the designer to optimize the component values for the circuit.
An improved approach to controlling the action of the power switch is to detect a zero voltage condition across the power switch. Examples of this approach are found in the Unitrode UCI 861 range of Resonant-mode Power Supply Controllers and the UCI 872 range of Resonant Lamp Ballast Controllers. In such devices, the power switch field effect transistor (FET) drain terminal is connected via a high value resistor to a xe2x80x9cZero Detectxe2x80x9d pin, which generates a synchronization pulse (for the control circuit oscillator) when the resonant waveform falls to zero.
While this approach is an improvement over circuits which change the state of the switching device based only on a fixed delay, it does have a disadvantage. This is because the zero detect method relies on the existence of a zero voltage condition to trigger the switch control signal. The resistive element used as part of the switch voltage sensor senses the actual voltage across the switching element and hence does not generate a switch control signal until that voltage is exactly zero. Thus, the xe2x80x9cZero Detectxe2x80x9d method found in the Unitrode devices requires the converter to be designed with sufficient inductive energy to ensure that the switch voltage always falls to zero at the end of each cycle. If the switch voltage does not fall to zero, then the Unitrode controller may default to a mode of operation in which it waits for the elapse of a fixed delay, and then turns the switch on (e.g., the first cycle after the power supply has been turned on). This will not be the optimum time for reducing switching related power losses. This is because during this delay the switch voltage may rise above zero (or its minimum), thereby increasing the power loss associated with the switching action.
Yet another approach to the reduction of power losses associated with switching operations is described in xe2x80x9cA Low-Cost Control IC for Single-Transistor ZVS Cold-Cathode Fluorescent Lamp Inverters and DC/DC Convertersxe2x80x9d, Redl et al., Proceedings of the Twelfth Annual Applied Power Electronics Conference and Exposition (APEC ""97), vol. 2, pages 1042-1049. The control IC described in the Redl paper has a zero voltage detection pin which is connected via a diode to the switching element, and turns on the switch when the switch voltage falls below 2V. If the switch voltage does not fall below 2V, then the IC oscillator will turn on the switch after a preset delay. This corresponds to the maximum time delay value and it acts to turn the switch xe2x80x9conxe2x80x9d if the ZVS gate drive circuit has not done so. This approach is thus a combination of a zero-detect and fixed delay technique.
However, as with the Unitrode approach discussed above, the method described in the Redl et al. paper cannot be used to turn the switch on at the switch voltage minimum (LVS operation) unless that minimum happens by coincidence to be 2 volts in a given instance. Consequently, the Redl et al. method will either turn on the switch before the switch voltage minimum, if that value is less than 2 volts, or will wait for the expiration of the default maximum time delay if the switch voltage minimum is greater than 2 volts. In either case, power loss associated with the switching action is not minimized.
What is desired is a circuit for controlling the operation of a switching device in a power supply, power converter, or other circuit so that the switching action occurs at the optimum time to minimize the stress and power loss associated with the change in state of the switch. It is also desired that the operation of the switch control circuit be independent of the tolerances of the circuit""s components and be adaptable to change the state of the switch at the optimal time based upon the condition of the circuit of which the switch is a part, regardless of whether a condition of zero voltage occurs across the switching element.
The present invention is directed to a circuit for controlling the switching behavior of a power switch (typically a field effect transistor (FET)) in a power supply, power converter, or other power controlling circuit. The inventive circuit includes an adaptive feedback loop which controls the switching operation of the FET through application of a gate drive signal to the device. The circuit is designed to turn the switching device on or off at the optimum time to reduce the stress and power losses associated with the switching action. The circuit includes a capacitor connected to the FET switch drain to sense the falling voltage across the switch. The adaptive gate drive circuit holds the FET switch off until the drain voltage sensed by the capacitor stops decreasing. At this time, the FET switch voltage is either zero (zero-voltage switching) or has reached the minimum value of its resonant ring (low-voltage switching). The gate drive circuit then turns the FET switch on, initiating a new cycle of charging up the inductor or primary transformer winding which is part of the power supply or converter. The present invention thus acts to minimize switching stress and power loss during the switching cycle.
Broadly stated, the present invention comprises a sensor responsive to a voltage across a switch to produce a sensor output signal proportional to a rate of change of the voltage across the switch and a switch state control signal generator responsive to the sensor output signal to generate a control signal to change the state of the switch when the sensor output signal is substantially equal to a predetermined value, e.g., zero.